KALRAY

MANAGEMENT OF MULTIPLE CACHE LINE INVALIDATIONS

N° US2025209002A1

MANAGEMENT OF MULTIPLE CACHE LINE INVALIDATIONS

N° EP4575808A1

OPTIMIZED MULTIPLY-ACCUMULATE OPERATOR FOR AI CALCULATIONS

N° US2025036362A1

OPTIMIZED MULTIPLY-ACCUMULATE OPERATOR FOR AI CALCULATIONS

N° EP4498228A1

Gestion de multiples invalidations d'une mémoire cache

N° FR3157585A1

MULTIPLE OPERAND FLOATING POINT ADDER WITH CORRECT ROUNDING

N° US2025130768A1

Opérateur de multiplication et accumulation optimisé pour les calculs impliqués dans l'IA

N° FR3151681A1

SYSTEM FOR MANAGING A GROUP OF ROTATING REGISTERS DEFINED ARBITRARILY IN A PROCESSOR REGISTER FILE

N° US2023315472A1

SYSTEM FOR MANAGING A GROUP OF ROTATING REGISTERS DEFINED ARBITRARILY IN A PROCESSOR REGISTER FILE

N° EP4254176A1

Système de gestion d'un groupe de registres tournants défini de façon arbitraire dans des registres de processeur

N° FR3134206A1

SYSTEM FOR PROCESSING MATRICES USING MULTIPLE PROCESSORS SIMULTANEOUSLY

N° US2022207108A1

System for simultaneously processing matrices using multiple processors

N° CN114691085A

Processor comprising a double multiplication and double addition operator actuable by an instruction with three operand references

N° US2022222073A1

Processor including double multiply double add operators drivable by instructions having three operand references

N° CN114691088A

PROCESSOR COMPRISING A DOUBLE MULTIPLICATION AND DOUBLE ADDITION OPERATOR ACTIVATED BY AN INSTRUCTION WITH THREE OPERAND REFERENCES

N° EP4024199A1

SYSTEM FOR PROCESSING MATRICES USING MULTIPLE PROCESSORS SIMULTANEOUSLY

N° EP4024237A1

Fast CRC computation circuit using an on-the-fly reconfigurable generator polynomial

N° US2021306002A1

FAST CRC CODE COMPUTATION CIRCUIT BY UTILIZING REAL-TIME RECONFIGURABLE GENERATOR POLYNOMIAL

N° CN113467987A

QUICK CRC CALCULATION CIRCUIT USING A REDUCTOR POLYNOMIAL RECONFIGURABLE ON THE FLIGHT

N° EP3890192A1

Processor with a configurable distribution of privileged resources and exceptions between protection rings

N° US2021200904A1

Système de traitement de matrices par plusieurs processeurs simultanément

N° FR3118505A1

PROCESSOR WITH CONFIGURABLE DISTRIBUTION OF PRIVILEGED RESOURCES AND EXCEPTIONS BETWEEN PROTECTION RINGS

N° CN113127936A

PROCESSEUR COMPRENANT UN OPERATEUR DE DOUBLE MULTIPLICATION ET DOUBLE ADDITION ACTIVABLE PAR UNE INSTRUCTION A TROIS REFERENCES D’OPERANDES

N° FR3118511A1

PROCESSOR WITH A CONFIGURABLE DISTRIBUTION OF PRIVILEGED RESOURCES AND EXCEPTIONS BETWEEN PROTECTION RINGS

N° EP3846029A1

Floating point dot-product operator with correct rounding

N° US2020409661A1

Fused Multiply-Add operator for mixed precision floating-point numbers with correct rounding

N° US2020409659A1

OPERATOR FOR COMBINED ADDITION AND MULTIPLICATION FOR NUMBERS WITH MIXED PRECISION FLOATING COMMA FOR PERFORMING CORRECT ROUNDING OFF

N° EP3757755A1

OPERATOR FOR SCALAR PRODUCT OF NUMBERS WITH FLOATING COMMA FOR PERFORMING CORRECT ROUNDING OFF

N° EP3757756A1

Circuit de calcul de CRC rapide utilisant un polynôme réducteur reconfigurable au vol

N° FR3108812A1

Processeur à distribution configurable des ressources privilégiées et exceptions aux anneaux de protection

N° FR3105855A1

Configurable inter-processor synchronization system

N° US2020210248A1

Blockwise matrix multiplication system

N° US2020201642A1

SYSTEM FOR MULTIPLYING MATRICES BY BLOCKS

N° EP3671488A1

CONFIGURABLE INTER-PROCESSOR SYNCHRONISATION SYSTEM

N° EP3674898A1

Opérateur de produit scalaire de nombres à virgule flottante réalisant un arrondi correct

N° FR3097993A1

Opérateur d’addition et multiplication fusionnées pour nombres à virgule flottante de précision mixte réalisant un arrondi correct

N° FR3097992A1

Système de synchronisation inter-processeurs configurable

N° FR3091363A1

Système de multiplication de matrices par blocs

N° FR3090932A1

Atomic instruction having a local scope limited to an intermediate cache level

N° US2017255571A1

ATOMIC INSTRUCTION HAVING A LOCAL SCOPE LIMITED TO AN INTERMEDIATE CACHE LEVEL

N° EP3217288A1

Token bucket flow-rate limiter

N° US2017149908A1

TOKEN BUCKET FLOW-RATE LIMITER

N° EP3174255A1

INSTRUCTION ATOMIQUE DE PORTEE LIMITEE A UN NIVEAU DE CACHE INTERMEDIAIRE

N° FR3048526A1

LIMITEUR DE DEBIT DE TYPE 'SEAU A JETONS'

N° FR3044188A1

Method for dispatching network frames among processing resources

N° US2016134725A1

A METHOD FOR DISPATCHING NETWORK FRAMES AMONG PROCESSING RESOURCES

N° EP3018886A1

Hardware synchronization barrier between processing units

N° US2015339173A1

Bit-matrix multiplication using explicit register

N° US2015339101A1

Inter-processor synchronization system

N° US2015339256A1

BIT-MATRIX MULTIPLICATION USING EXPLICIT REGISTER

N° EP2947562A1

MATERIAL SYNCHRONISATION BARRIER BETWEEN PROCESSING ELEMENTS

N° EP2950214A2

INTER-PROCESSOR SYNCHRONIZATION SYSTEM

N° EP2947577A1

VLIW TYPE INSTRUCTION PACKET STRUCTURE AND PROCESSOR SUITABLE FOR PROCESSING SUCH AN INSTRUCTION PACKET

N° WO2015177427A1

VLIW TYPE INSTRUCTION PACKET STRUCTURE AND PROCESSOR SUITABLE FOR PROCESSING SUCH AN INSTRUCTION PACKET

N° EP3146424A1

VLIW type instruction packet structure and processor suitable for processing such an instruction packet

N° US2017192792A1

BARRIERE DE SYNCHRONISATION MATERIELLE ENTRE ELEMENTS DE TRAITEMENT

N° FR3021429A1

PROCEDE DE DISTRIBUTION DE TRAMES RESEAU VERS DES RESSOURCES DE TRAITEMENT

N° FR3028372A1

SYSTEM FOR TRANSLATING VIRTUAL ADDRESSES INTO PHYSICAL ADDRESSES FOR COMMUNICATION CHANNELS OF A NETWORK

N° WO2014202889A1

MULTIPLICATION DE MATRICES DE BITS UTILISANT DES REGISTRES EXPLICITES

N° FR3021428A1

STRUCTURE DE PAQUET D'INSTRUCTIONS DE TYPE VLIW ET PROCESSEUR ADAPTE POUR TRAITER UN TEL PAQUET D'INSTRUCTIONS

N° FR3021427A1

SYSTEME DE SYNCHRONISATION INTER-PROCESSEURS

N° FR3021433A1

DATA GROUPING SYSTEM FOR IMPROVING THE WRITE RATE IN A DYNAMIC MEMORY

N° WO2014091113A1

SYSTEME DE TRADUCTION D'ADRESSES VIRTUELLES EN ADRESSES PHYSIQUES POUR DES CANAUX DE COMMUNICATION D'UN RESEAU

N° FR3007163A1

REDUCTION OF THE ELECTRICAL CONSUMPTION OF AN ARRAY OF PROCESSORS

N° WO2013160572A2

SYSTEM FOR THE TRANSMISSION OF CONCURRENT DATA STREAMS OVER A NETWORK

N° EP2795854A1

SYSTEM FOR THE TRANSMISSION OF CONCURRENT DATA STREAMS OVER A NETWORK

N° WO2013093239A1

SYSTEM FOR THE TRANSMISSION OF CONCURRENT DATA STREAMS OVER A NETWORK

N° WO2013093241A1

SYSTEM FOR THE TRANSMISSION OF CONCURRENT DATA STREAMS OVER A NETWORK

N° EP2795853A1

SYSTEM FOR TRANSMITTING CONCURRENT DATA FLOWS ON A NETWORK

N° US2014301206A1

System for transmitting concurrent data flows on a network

N° US2014301207A1

SYSTEME DE REGROUPEMENT DE DONNEES POUR AMELIORER LE DEBIT D'ECRITURE DANS UNE MEMOIRE DYNAMIQUE

N° FR2999773A1

Apparatus and method for combining thread warps with compatible execution masks for simultaneous execution and increased lane utilization

N° US2014164737A1

STREAM MANAGEMENT IN AN ON-CHIP NETWORK

N° WO2013061190A1

STREAM MANAGEMENT IN AN ON-CHIP NETWORK

N° EP2771800A1

Stream management in an on-chip network

N° US2014301205A1

Extensible network-on-chip

N° EP2562654A1

Extensible network-on-chip

N° US2013054811A1

REDUCTION DE LA CONSOMMATION ELECTRIQUE D'UNE MATRICE DE PROCESSEURS

N° FR2989797A1

MIXED-PRECISION MERGED MULTIPLICATION AND ADDITION OPERATOR

N° WO2012175828A1

Mixed precision fused multiply-add operator

N° US2014089371A1

MIXED PRECISION FUSED MULTIPLY ACCUMULATOR

N° EP2702478A1

Method for allocating and executing tasks in multiprocessor circuit, involves applying combination of static allocations for which position of single cluster coincides with position of defective cluster when defective cluster is detected

N° FR2988876A1

Method for allocation and execution of tasks in multiprocessor circuit organized into matrix of clusters of processors, involves detecting failing resource in clusters and deactivating failing resource

N° FR2988877A1

SYSTEME D'EMISSION DE FLOTS DE DONNEES CONCURRENTS SUR UN RESEAU

N° FR2984657A1

SYSTEME D'EMISSION DE FLOTS DE DONNEES CONCURRENTS SUR UN RESEAU

N° FR2984656A1

GESTION DE FLUX DANS UN RESEAU SUR PUCE

N° FR2982049A1

RESEAU SUR PUCE EXTENSIBLE

N° FR2979444A1

OPERATEUR DE MULTIPLICATION ET ADDITION FUSIONNEES A PRECISION MIXTE

N° FR2974645A1